Download e-book for iPad: Analog-Baseband Architectures And Circuits For Multistandard by Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

ISBN-10: 1402064322

ISBN-13: 9781402064326

ISBN-10: 1402064330

ISBN-13: 9781402064333

With the prior few decade efforts on lithography and integrated-circuit (IC) applied sciences, very reasonably cheap microsystems were effectively constructed for plenty of diversified purposes. the craze in instant communications is towards making a networkubiquitous period within the future years. Many exceptional possibilities and demanding situations, reminiscent of layout for multi-standardability and low-voltage (LV) compliance, are quickly changing into the mainstream instructions in wireless-IC study and improvement, on condition that the previous can provide the simplest connectivity between assorted networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for extra fee and tool relief.

Analog-Baseband Architecturees and Circuits presents architectural and circuit innovations for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the e-book reports the actual layer necessities of contemporary instant conversation criteria, provides the basic tradeoffs excited about transceiver structure choice, and offers case stories of the state of the art multistandard transceivers, the place the main options bolstered are highlighted and mentioned. A statistical precis (with a hundred+ references pointed out) of so much used transmitter and receiver architectures for contemporary verbal exchange criteria is supplied. all of the references are citied from the major boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The moment half makes a speciality of the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection approach is disclosed. It, during the reconfiguration of receiver and transmitter analog basebands, allows not just a leisure of the RF frequency synthesizer’s and native oscillator’s layout standards, but in addition an effective multistandard compliance by means of synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the main is proven in few layout examples. one among them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but additionally encompasses a flexible-IF topology, a special 3D-stack floorplan, and a selected layout technique for prime testability and routability.

The 3rd half bargains with the circuit layout. as well as the methodical description of many LV circuit suggestions, three tailormade LV-robust sensible blocks are provided. They contain: 1) a double-quadrature-downconversion filter out (DQDF) – it realizes at the same time clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it bargains a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon region required for knowing a wide time consistent on chip whereas maximizing its highpass-pole switchability for quick dc-offset transient.

The final half provides experimental result of the three tailored construction blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS technique. formerly untold on-/off-chip co-setup for either full-chip and construction blocks measurements are defined. not just the construction blocks have effectively prolonged the state of the art boundary by way of sign bandwidth and provide voltage, the analog-baseband IC has been to this point the lowest-voltage-reported resolution for IEEE 802.11a/b/g WLAN receivers.

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88–89, Feb. 2002. 67] M. 4 GHz RF Transceiver with Digital Channel-Selection Filter for Bluetooth,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 93–94, Feb. 2002. 68] H. 8-V Operation RFCMOS Transceiver for Bluetooth,” IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp. 230–233, June 2002. 69] C. , “A 43mW Bluetooth Transceiver with –91dBm Sensitivity,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp.

39]. 11a/g, a frequency error in frequency conversion can locate the ±1st subcarriers on the notch of the dc-offset cancellation. 45] is similar to superheterodyne but using a relatively high IF (such as 3 GHz) to allow the image rejection to be fully realized onchip. Moreover, since the channel selection is at IF, lower power and better phase-noise LO is expected when comparing it with the zero-IF design. The 20 Analog-Baseband Architectures and Circuits frequency plan is critical to maximize the functional blocks sharing in the dual-conversion.

14] S. Tadjpour, E. Cijvat, E. Hegazi and A. 35 µm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 292–293, Feb. 2001. 15] B. , “A 900-MHz CMOS Direct Conversion Receiver,” IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp. 113–114, June 1997. 16] B. 8-GHz CMOS Transmitter for Dual-band Applications,” IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp. 128–131, June 1998. 17] M. Borremans and M. Steyaert, “A CMOS 2V Quadrature Direct Up-Converter Chip for DCS-1800 Integration,” in Proc.

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